In recent years, the data rates at which communications may be carried out over conventional telephone networks and wiring has greatly increased. These increases are due, in large part, to newly adopted techniques of multiplexing and modulating signals representative of the messages or data being communicated, resulting in greatly improved communication bandwidth. In addition, the carrier frequencies at which such communications are being carried out have also increased in recent years, further improving the bit rate.
In general, the local oscillator frequencies used in a transmitting modem and a receiving modem are not identical. The frequencies of their clocks can be off by as much as 100 ppm. One of the tasks of the receiving modem is to generate a signal that allows it to sample the output of the receiver portion of the modem at the best timing instant. The best timing instant gives the best estimate of the instant to sample the transmitted data. In doing so, the receiver must first acquire and then track the frequency drift of the transmitter's clock. This invention provides a novel method for solving this problem, and is especially useful in burst CAP/QAM modems.
Use of quadrature modulation is intended to increase the information-carrying capacity of a modulated signal. One such modulation is Quadrature Amplitude Modulation (QAM), described by Betts et al. in U.S. Pat. No. 5,859,877. QAM involves transmitting data as a sequence of two-dimensional complex signals, i.e. with both in-phase and quadrature components. Each symbol, is assigned a specific pre-defined value according to the data it represents. A set of all of the values available for transmission is termed a constellation, and so resembles a constellation when graphically plotted on a two-dimensional basis.
Another modulation scheme is Carrierless Amplitude Phase modulation (CAP). Receivers using CAP modulation are a bandwidth-efficient means for receiving modulated signals using two-dimensional pass band line code in which the symbol data is organized in I and Q pairs. Knutson et al, U.S. Pat. No. 5,930,309, describes a receiver signal processing system for CAP signals. The I and Q data in such a system are filtered with orthogonal I and Q band pass filters having a common pass band. With CAP, processing is done in the pass band of the filters, which eliminates the need for a carrier tracking loop. However, tighter symbol timing constraints is required due to the frequencies of the pulses transmitted. CAP signals can resemble QAM signals except the transmitted data is not spinning or rotating at a carrier frequency.
There are several conventional ways to perform timing recovery in a CAP/QAM system. One method is to implement a phase lock loop (PLL) using a combination of analog and digital techniques as shown in FIG. 1. A Timing Phase Detector (TPD) processes the incoming data samples, s[n], sampled from a signal S(t) by using an analog to digital converter (A/D) 104. One known method, which can perform the function of the TPD 101, is a Band Edge Component Maximization (BECM) process which generates an error signal that is proportional to the difference in phase between the transmitter and receiver clocks. The error signal generated by the TPD 101 is filtered (or averaged) and passed on to a digital to analog (D/A) converter 102. The D/A converter output is used to control the frequency of a voltage controlled oscillator (VCO) 103. The advantage of this approach is that the rest of the receiver does not need to comprehend the timing mismatches. It assumes that the incoming data stream has been sampled at the optimum instant. However, a disadvantage of this approach is the mixing of both analog and digital circuitry.
Another known method for performing timing recovery is an all digital implementation of a PLL as illustrated in FIG. 2. The receiver A/D converter is clocked by a free running oscillator 201. As in the first method, a Timing Phase Detector 101 is used to determine the phase error between the transmitter and receiver clocks according to the frequency of the free running oscillator 201. The error signal from the TPD 101 is then passed to an interpolator 202. The interpolator 202 generates optimally sampled data samples s*[n] based on the signal S(t) sampled by the fee running oscillator at a frequency regulated by the receiver clock. The interpolator 202 adds a fractional delay (less than 1 sample period delay) between the A/D converter and the rest of the receiver processing based on the error signal. The amount of delay is increased or decreased to correct for the transmitter clock drift measured by the TPD. A disadvantage of this method arises when a sample is to be inserted or deleted and the amount of delay required by the interpolator is more than one sample period to be inserted and less than one sample period to be deleted, respectively. As a consequence, when a sample must be inserted, for example the receiver has one sample period less time to process the signal and information may be lost.